Low-density parity-check codes are used in numerous data storage and signals applications. During decoding, posteriori log-likelihood ratios, extrinsic log-likelihood ratios and syndrome vectors are often not stored after convergence or failure in order to increase decoder throughput. In that case, the applicability of post processing is limited. In multi-level cell memories, at least one of the most significant bit or least significant bit pages converges to a codeword most of the time, usually the least significant bit page in random noise dominated memories. On the other hand, in write error dominated memories the most significant bit pages converge more often.
Consequently, it would be advantageous if an apparatus existed that is suitable for using successfully decoded codewords and corresponding data to identify and correct write errors using this asymmetry in decoding success among pages on the same wordline.